Multiprocessor System-on-Chip (MPSoC) refers to a System-on-Chip architecture where multiple different processors and hardware units are integrated onto a single chip. Although the term initially suggests a general architecture, MPSoC platforms are all from Xilinx, such as the components of the family Zynq UltraScale+. The term therefore exclusively targets the corresponding processor-FPGA architecture.
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Architecture
Zynq or MPSoC devices extend the concept of a classic SoC with a heterogeneous multiprocessor structure. While a conventional SoC typically integrates a main processor with peripherals, an MPSoC contains multiple processors with different tasks. A common combination includes high-performance application processors (e.g., ARM Cortex-A), real-time processors (e.g., Cortex-R), and additional programmable logic. This allows various tasks – operating system functions, real-time control, signal processing, or hardware acceleration – to be executed in parallel on the same chip.
The architecture of Zynq UltraScale+ MPSoC devices is based on a heterogeneous system-on-chip concept. In Xilinx's MPSoC architectures, the chip typically consists of two main areas: the Processing System (PS)-Domain and the Programmable Logic (PL). The processing system includes processor clusters, memory controllers, communication interfaces, and peripherals. The programmable logic is based on an FPGA architecture, allowing developers to implement their own hardware blocks.
A central component is the Application Processing Unit (APU). This consists of several Arm Cortex-A53 processors and forms the classic application platform of the system. Operating systems such as Linux or other embedded OS typically run on these cores. They handle tasks like system control, network communication, data processing, or complex software applications. The processor clusters have cache hierarchies and support SIMD acceleration through NEON as well as floating-point calculations.
In addition to the APU, the architecture includes a Real-Time Processing Unit (RPU) based on the R5 architecture. The cores have locally attached memory (TCM) and a Memory Protection Unit. AMD argues that functional safety systems can be implemented using RISC cores.
A key feature of an MPSoC is its internal high-speed interconnect architecture. In many designs, this is based on Arm’s AMBA bus architecture, specifically on AXI interconnects. These interconnects link processors, memory, and hardware accelerators, enabling parallel access to memory resources and deterministic data transfer.
Scope of application
MPSoCs are primarily used in applications where high processing power, deterministic real-time processing, and flexible hardware customization are simultaneously required. Typical application areas include industrial controls, image and signal processing, communication systems, autonomous systems, aerospace engineering, and military electronics.
In embedded system development, MPSoCs enable tight coupling of software and hardware within a single chip. Developers can partition functionality between processor software and FPGA logic, creating an architecture that supports both general-purpose computing and specialized hardware acceleration. This makes Zynq platforms particularly suitable for complex embedded systems with high demands for parallelism, data processing, and system integration.
Defence-grade MPSoC
With the Zynq UltraScale+ XQ, there is a specially qualified variant of the Zynq UltraScale+ MPSoC architecture intended for aerospace and military applications. These devices are largely functionally identical to their civilian counterparts but meet additional requirements regarding reliability, lifespan, temperature range, and supply chain control.
A key feature of these devices is their long-term availability. Defense-grade components are manufactured and supported for very long periods. For many designs, a product availability of well over 15 years is specified. This long-term availability is crucial in military programs, as platforms are often operated for several decades.
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