RISC stands for „Reduced Instruction Set Computer“ and refers to a processor architecture that evolved from a fundamental reevaluation of processor design in the late 1970s and early 1980s. The focus was not simply on „fewer instructions,“ but on the question of which tasks should reasonably be executed in hardware and which could be better handled by compilers and software. The Reduced Instruction Set thus emerged as a counter-movement to a phase in which processors were being equipped with increasingly complex instruction sets.
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CISC vs. RISC
In the 1970s, architectures later known as CISC, or „Complex Instruction Set Computer,“ dominated. Processors like the DEC VAX offered extensive, sometimes highly abstracted instructions. The idea behind this was to reduce the gap between high-level languages and machine code. Complex operations were to be directly supported by individual machine instructions. This suited a time when memory was expensive, assembly programming still played a larger role, and microcode was considered a flexible way to implement complex instructions.
Toward the end of the 1970s, this perspective shifted. Compilers became more powerful, high-level languages gained wider acceptance, and semiconductor integration enabled new processor designs. At the same time, it became apparent that many complex machine instructions were rarely used or difficult for compilers to utilize. The effort required to implement such instructions in hardware or microcode was not always proportionate to their actual utility.
IBM 801 and further developments
An early milestone was IBM 801-Project. Starting in 1974, a team led by John Cocke worked on a controller for telephone exchanges that was intended to handle a very high number of connections per second. Although the original project was discontinued, the architectural considerations led to the IBM 801, one of the first practical systems. The name 801 referred to the IBM building where the project originated. The IBM 801 is considered an important precursor to later processors today.
In parallel, other formative projects emerged at universities. At the University of California, Berkeley, David A. Patterson and Carlo H. Séquin worked on the Berkeley RISC project. They coined the term RISC in the early 1980s. At Stanford University, John L. Hennessy developed the MIPS project, whose name originally stood for „Microprocessor without Interlocked Pipeline Stages.“ IBM 801, Berkeley, and Stanford MIPS together formed the core of the early movement.
Typical of early architectures were a regular instruction set, many general-purpose registers, load-store principles, and often a fixed instruction length. Arithmetic instructions typically operated on registers, while memory accesses were handled by separate load and store instructions. This model suited compilers well because register allocation, intermediate results, and optimizations could be handled more systematically. At the same time, the regular structure facilitated pipeline processing.
In the 1980s, RISC became a central theme in processor development. Numerous manufacturers developed their own architectures: Acorn developed the ARM architecture, MIPS was commercialized, Sun launched SPARC Notably, HP developed the PA, Motorola the 88000, IBM the POWER architecture, and DEC later the Alpha. Apple, IBM, and Motorola began working on PowerPC in the early 1990s. The reduced instruction set became the basis for many workstations, servers, embedded systems, and specialized computers.
ARM
Plays a special role ARM. The architecture originally arose at Acorn for the Archimedes home computer. „Acorn RISC Machine“ later became ARM. Unlike many classic processor manufacturers, ARM did not manufacture the processors itself but licensed the design to other companies. This business model was crucial for its widespread adoption. ARM cores found their way into mobile phones, PDAs, smartphones, tablets, routers, cameras, Microcontroller, game consoles, and later also notebooks and servers.
Today, ARM is one of the most important families of processors. ARM has had a strong presence in embedded systems for decades, particularly through Cortex-M microcontrollers and Cortex-A application processors. In the mobile sector, ARM has become the dominant architecture. Modern smartphones, many tablets, and numerous IoT devices are based on ARM cores. With Apple Silicon—namely the M1, M2, M3, and their successors—ARM has also made its mark in the notebook and desktop sectors. In addition, ARM is making inroads into server markets, for example through AWS Graviton, Ampere Altra and other platforms.
PowerPC, MIPS, and SPARC
IBM continued to develop RISC through POWER and PowerPC. The RS/6000 systems, introduced in 1990, established POWER as a key architecture for workstations and servers. PowerPC was used in Apple Macintosh systems, in game consoles such as the Nintendo GameCube, Wii, and Xbox 360, as well as in vehicles and communication systems. POWER processors also remained relevant in high-performance computing. IBM Blue Gene, Watson, and Summit utilized POWER-based architectures.
MIPS was also an influential RISC family. Originally used in workstations and servers, MIPS later moved heavily into embedded applications. Routers, network devices, game consoles, and consumer electronics utilized MIPS processors. Examples include early PlayStation systems, Nintendo 64, network devices, and many router platforms. However, MIPS lost significance in classic workstations.
SPARC, developed by Sun Microsystems, was long associated with UNIX workstations and servers. HP PA and DEC Alpha were also major players in the RISC era of the server and workstation market. Alpha was considered a particularly powerful architecture from a technical standpoint, but like many other families, it disappeared due to market shifts, acquisitions, and the growing influence of x86. This trajectory shows that technical elegance alone does not determine long-term market success.
RISC-V
One of the most significant current developments is RISC-V. RISC-V is an open instruction set that originated at the University of California, Berkeley, and is now managed by a nonprofit organization. Unlike ARM or x86, this open standard is not tied to a single commercial licensor. Companies, research institutions, and open-source projects can develop their own implementations. This makes it particularly attractive for research, education, microcontrollers, specialized processors, and, increasingly, industrial applications.
RISC-V is currently used in embedded systems, microcontrollers, security controllers, SoCs, AI accelerators, and custom chips. The openness of the instruction set facilitates custom extensions, for example, for signal processing, cryptography, safety applications, or machine learning. Companies like SiFive, Andes, Ventana, and Esperanto demonstrate that RISC-V can be used not only for small controllers but also for more powerful cores and massively parallel systems.
RISC today
The classic RISC-versus-CISC dichotomy is of limited relevance today. While modern x86 processors still have a CISC instruction set on the outside, they internally translate many instructions into simpler micro-operations that are executed in heavily pipelined and superscalar cores. At the same time, „reduced“ architectures have incorporated more complex extensions, such as SIMD, vector, cryptography, or machine learning instructions. As a result, the line between RISC and CISC has become blurred.
A modern ARM, POWER, or RISC-V processor can be highly complex internally, even though its instruction set is based on RISC principles. Out-of-order execution, branch prediction, multiple execution units, cache hierarchies, and vector units are now standard features even in RISC processors. Reduced Instruction Set Computer therefore describes not so much a simple hardware design as a specific approach to structuring the instruction set and the interface between software and the processor.
ARM Cortex-M dominates many industrial and commercial applications, while RISC-V emerges as an alternative. RISC cores are widely used in controllers, sensors, actuators, measurement systems, communication modules, and safety-critical embedded systems. Often, a trade-off is at the forefront, meaning a suitable combination of computing power, power consumption, cost, toolchain, peripherals, and long-term availability.
RISC is thus less of a historical buzzword than a line of development that has shaped many of today’s processors. From the IBM 801 through Stanford MIPS, ARM, POWER, and SPARC to RISC-V, a common question runs through it all: What should the interface between software and hardware look like so that processors remain easy to implement, easy to program, and scalable for new applications? The answer has evolved over the decades, but the principles remain recognizable in many modern architectures.
Today, you encounter Reduced Instruction Set Computing virtually everywhere: in smartphones, microcontrollers, routers, Automotive control units, Industrial electronics, data centers, supercomputers, and AI accelerators. ARM is the most visible mass-market representative, POWER remains relevant in selected high-performance segments but is gradually being replaced. Thus, RISC is a term from computer history and an architectural approach at the same time, continuing to shape the development of modern computing systems.
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